ISRO CSE 2009
Q22.
A certain microprocessor requires 4.5 microseconds to respond to an interrupt. Assuming that the three interruptsI_1, I_2 and I_3 require the following execution time after the interrupt is recognized: I. I_1 requires 25 microseconds II. I_2 requires 35 microseconds III. I_3 requires 20 microseconds I_1 has the highest priority and I_3 has the lowest. What is the possible range of time for I_3 to be executed assuming that it may or may not occur simultaneously with other interrupts?Q23.
Which of the following statements about synchronous and asynchronous I/O is NOT true?Q25.
The process of organizing the memory into two banks to allow 8-and 16-bit data operation is calledQ30.
A processor that has carry, overflow and sign flag bits as part of its program status word (PSW) performs addition of the following two 2's complement numbers 01001101 and 11101001. After the execution of this addition operation, the status of the carry, overflow and sign flags, respectively will be